This invention relates to a solid-state imaging device, and more particularly to an enhancement in the dynamic range of the solid-state imaging device.
FIG. 1 shows a typical example of a prior-art solid-state imaging device (hereinbelow, termed "photosensor"). It illustrates the fundamental circuit arrangement of a MOS-type photosensor in which picture elements employing insulated-gate field effect transistors (hereinbelow, termed "MOSTs") as vertical switching elements and employing the source junctions of the MOSTs as photodiodes are arrayed in the form of a matrix. In the figure, numeral 1 designates a shift register which serves as a horizontal scanning circuit, numeral 2 a shift register which serves as a vertical scanning circuit, numeral 3 an interlace circuit, numeral 4 a vertical scanning line (vertical gate line) for addressing in the Y direction, numeral 5 a photogate which serves as a vertical switching element, numeral 6 a photodiode, numeral 7 a vertical signal output line, numeral 8 a horizontal switching element for executing sequential addressing in the X direction with an output from the horizontal shift register 1, numeral 10 a horizontal signal output line, numeral 11 an output terminal, and numeral 12 a region of a photodiode array.
FIG. 2 shows a concrete example of the interlace circuit indicated at 3 in FIG. 1. In the figure, numeral 21 designates the vertical shift register, numeral 22 the interlace circuit, and numeral 23 the region of the photodiode array. The operation of the circuitry in FIG. 2 will be described. For example, in case where a field pulse F.sub.1 enters a terminal 24, the delivery of an output pulse from the vertical shift register 21 to an output line 26 results in that vertical gate lines 28 and 29 are simultaneously picked up in response thereto. When an output pulse is subsequently delivered to an output line 27, vertical gate lines 30 and 31 are simultaneously picked up. On the other hand, in case where a field pulse F.sub.2 enters a terminal 25, pairs of vertical gate lines which are picked up in response to the output pulses from the vertical shift register 21 to the output lines 26 and 27 are a set of the lines 29 and 30 and a set of lines 31 and 32, respectively. That is, the set of the vertical gate lines to be picked up is shifted by the change-over of the field pulses, whereby the interlacing is permitted.
The photosensor of the circuit arrangement as shown in FIGS. 1 and 2 encounters the difficult problem of the reduction of a dynamic range when it is intended to realize a photosensor of high packaging density which has a comparatively small size enough to be fabricated on the mass-production basis and a number of picture elements enough to attain a resolution of practical level. The packaging density of the photosensor as stated above exceeds the scale of a device being presently developed as a VLSI (Very Large Scale Integration), requires the fine patterning technology and results in inevitably lowering a supply voltage in relation to the device breakdown and reliability. This point is discussed in detail in, for example, H. Masuda et al., "Characteristics and Limitation of Scaled Down MOSFET's Due to Two-Dimensional Field Effect", IEEE Trans., Electron Devices, ED-26, 6, p. 980, June 1979.
In the photosensor of the circuit arrangement shown in FIGS. 1 and 2, interlace switches formed of MOSTs 201 are employed in the interlace circuit portion, and hence, voltage drops based on a threshold voltage V.sub.T are unavoidably caused. Even if a voltage kept intact at a supply voltage V.sub.DD is fed from the vertical shift register, only a voltage (V.sub.DD -V.sub.T) will be applied to the vertical gate lines. In this case, the threshold voltage V.sub.T often has a great value on account of the substrate effect, and it is not uncommon that (V.sub.DD -V.sub.T) is smaller than V.sub.DD as much as 20-30%. Further, the dynamic range of the photosensor is given by (V.sub.DD V.sub.T -V.sub.T ') where V.sub.T ' denotes the threshold voltage of the photogate 5. Therefore, the reduction of the dynamic range due to the threshold voltages becomes as much as near 50% of the supply voltage V.sub.DD, to incur the serious problem that the dynamic range becomes much lower than the supply voltage V.sub.DD which is low in itself as described before. For example, in case where the supply voltage V.sub.DD is made 5 V used in a recent high-packaged MOSLSI, the dynamic range becomes less than approximately 1.5 V on the supposition that V.sub.T .about.2.0 V and V.sub.T '.about.1.5 V (V.sub.T and V.sub.T ' become great on account of the presence of the substrate effect). This is not practical in that, at a high contrast scene, the while level is limited to render a reproduced image unsightly in actuality.